Automated synthesis of analog electrical circuits by means of genetic programming

The design (synthesis) of analog electrical circuits starts with a highlevel statement of the circuit's desired behavior and requires creating a circuit that satisfies the specified design goals. Analog circuit synthesis entails the creation of both the topology and the sizing (numerical values) of all of the circuit's components. The difficulty of the problem of analog circuit synthesis is well known and there is no previously known general automated technique for synthesizing an analog circuit from a high-level statement of the circuit's desired behavior. This paper presents a single uniform approach using genetic programming for the automatic synthesis of both the topology and sizing of a suite of eight different prototypical analog circuits, including a lowpass filter, a crossover (woofer and tweeter) filter, a source identification circuit, an amplifier, a computational circuit, a time-optimal controller circuit, a temperature-sensing circuit, and a voltage reference circuit. The problem-specific information required for each of the eight problems is minimal and consists primarily of the number of inputs and outputs of the desired circuit, the types of available components, and a fitness measure that restates the high-level statement of the circuit's desired behavior as a measurable mathematical quantity. The eight genetically evolved circuits constitute an instance of an evolutionary computation technique producing results on a task that is usually thought of as requiring human intelligence. The fact that a single uniform approach yielded a satisfactory design for each of the eight circuits as well as the fact that a satisfactory design was created on the first or second run of each problem are evidence for the general applicability of genetic programming for solving the problem of automatic synthesis of analog electrical circuits. Index Terms – Design automation, genetic programming, analog circuit synthesis, electrical circuits. IEEE TEC Paper No. 26 – Version 4 -June 9, 1997 2 J. Koza is with the Computer Science Department, Stanford University, Stanford, California 94305 (e-mail: [email protected]; URL: http://www-cs-faculty.stanford.edu/~koza/). Forrest H Bennett III is a visiting scholar with Computer Science Department, Stanford University, Stanford, California 94305 (e-mail: [email protected]). David Andre is with Computer Science Division, University of California, Berkeley, California (e-mail: [email protected]) Martin A. Keane is with Martin Keane Inc., 5733 West Grover, Chicago, Illinois 60630 (email: [email protected]). Frank Dunlap is with Enabling Technology, Inc., Palo Alto, California (e-mail: [email protected]). IEEE TEC Paper No. 26 – Version 4 -June 9, 1997 3